Hi all,
Thanks everyone for your attention and your constructive reactions.
Please find attached the slide we showed yesterday. It shows our future system architecture for next year. I’ve added notes to explain what is what.
It would be interesting other companies also share their plans, we might find common patterns.
Best regards,
Colin Maudry
Product data analyst and DITA specialist
NXP Semiconductors
From: [mailto:] On Behalf Of Beims Bob-RWBC70
Sent: Wednesday, October 24, 2012 11:22 PM
To: Semiconductor Information Design Subcommittee
Subject: [dita-sidsc] 2012-10-24 teleconference recording available
For those who could not participate in today's teleconference, the recording replay is available @
https://www147.livemeeting.com/cc/freescale/view?id=sidsc-121024
The primary topic of discussion was one of content lifecycle best practices guided by a proposed high-level system architecture presented by NXP. I strongly recommend that you spend the time to listen through the session.
To everyone, let's make good use of the email list to continue the conversation!
Respectfully,
Bob Beims
Chair, OASIS DITA TC Semiconductor Information Design Subcommittee (SIDSC)
Applications Engineer, Staff Principal
Automotive & Industrial Solutions Group
Freescale Semiconductor, Inc.
6501 William Cannon Drive West, MD: OE327
Austin, TX 78735-8598
www.freescale.com
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Attachment:
NXP system arch roadmap.pdf
Description: NXP system arch roadmap.pdf
