Re: [virtio] [PATCH 5/5] feedback: add reference to PCI specifications

"Michael S. Tsirkin" <> writes:
> We'll add more non-normative sections with hints for
> implementing registers such as PCI class, status
> and command registers.
>
> Cc: Arun Subbarao <>
> Signed-off-by: Michael S. Tsirkin <>

Excellent!

I just realized that these are actually from Arun's feedback, so instead
of applying them, please create one or more entries in the feedback/
directory for them, so we can approve them at the next meeting.

(Then I can send an official acknowledgement about what we decided to do, 
if anything).

Thanks,
Rusty.

> ---
>  content.tex      | 11 +++++++++++
>  introduction.tex | 12 ++++++++++++
>  2 files changed, 23 insertions(+)
>
> diff --git a/content.tex b/content.tex
> index 365df87..85452e8 100644
> --- a/content.tex
> +++ b/content.tex
> @@ -781,6 +781,17 @@ into virtio general and bus-specific sections.
>  
>  Virtio devices are commonly implemented as PCI devices.
>  
> +A Virtio device can be implemented as any kind of PCI device:
> +a Conventional PCI device, a PCI-X device or a PCI Express
> +device.  A Virtio device using Virtio Over PCI Bus MUST expose to
> +guest an interface that meets the specification requirements of
> +the appropriate PCI specification: \hyperref[intro:PCI]{[PCI]},
> +\hyperref[intro:PCI-X]{[PCI-X]} and \hyperref[intro:PCIe]{[PCIe]}
> +respectively.  To assure designs meet the latest level
> +requirements, designers of Virtio Over PCI devices must refer to
> +the PCI-SIG home page at \url{http://www.pcisig.com} for any
> +approved changes.
> +
>  \subsection{PCI Device Discovery}\label{sec:Virtio Transport Options / Virtio Over PCI Bus / PCI Device Discovery}
>  
>  Any PCI device with Vendor ID 0x1AF4, and Device ID 0x1000 through
> diff --git a/introduction.tex b/introduction.tex
> index 7c79921..fbe69f6 100644
> --- a/introduction.tex
> +++ b/introduction.tex
> @@ -46,6 +46,18 @@ The key words "MUST", "MUST NOT", "REQUIRED", "SHALL", "SHALL NOT", "SHOULD", "S
>  	\phantomsection\label{intro:rfc2119}\textbf{[RFC2119]} & S. Bradner, Key words for use in RFCs to Indicate Requirement Levels, \newline\url{http://www.ietf.org/rfc/rfc2119.txt}, March 1997\\
>  	\phantomsection\label{intro:S390 PoP}\textbf{[S390 PoP]} & z/Architecture Principles of Operation, \newline IBM Publication SA22-7832\\
>  	\phantomsection\label{intro:S390 Common I/O}\textbf{[S390 Common I/O]} & ESA/390 Common I/O-Device and Self-Description, \newline IBM Publication SA22-7204\\
> +	\phantomsection\label{intro:PCI}\textbf{[PCI]} &
> +	Conventional PCI Specifications,
> +	\newline\url{http://www.pcisig.com/specifications/conventional/},
> +	PCI-SIG\\
> +	\phantomsection\label{intro:PCI-X}\textbf{[PCI-X]} &
> +	PCI-X Specifications,
> +	\newline\url{http://www.pcisig.com/specifications/pcix_20/},
> +	PCI-SIG\\
> +	\phantomsection\label{intro:PCI-X}\textbf{[PCIe]} &
> +	PCI Express Specifications
> +	\newline\url{http://www.pcisig.com/specifications/pciexpress/},
> +	PCI-SIG\\
>  \end{longtable}
>  
>  \newpage
> -- 
> MST
>
>
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